Nfe Tools an Expeption Occured Durring Data Flash Reading
Fatal Errors¶
[中文]
Overview¶
In certain situations, execution of the plan can not be continued in a well divers way. In ESP-IDF, these situations include:
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CPU Exceptions: Illegal Instruction, Load/Store Alignment Error, Load/Store Prohibited fault, Double Exception.
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System level checks and safeguards:
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Interrupt watchdog timeout
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Task watchdog timeout (only fatal if CONFIG_ESP_TASK_WDT_PANIC is set)
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Cache access error
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Brownout detection issue
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Stack overflow
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Stack smashing protection check
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Heap integrity check
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Undefined behavior sanitizer (UBSAN) checks
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Failed assertions, via
assert,configASSERTand similar macros.
This guide explains the procedure used in ESP-IDF for handling these errors, and provides suggestions on troubleshooting the errors.
Panic Handler¶
Every error cause listed in the Overview will be handled by the panic handler.
The panic handler will start by press the crusade of the error to the console. For CPU exceptions, the bulletin will be similar to
Guru Meditation Error: Cadre 0 panic'ed (IllegalInstruction). Exception was unhandled.
For some of the arrangement level checks (interrupt watchdog, cache access error), the message will exist like to
Guru Meditation Error: Cadre 0 panic'ed (Cache disabled but cached memory region accessed). Exception was unhandled.
In all cases, the mistake crusade will be printed in parentheses. Meet Guru Meditation Errors for a list of possible fault causes.
Subsequent behavior of the panic handler can exist set using CONFIG_ESP_SYSTEM_PANIC configuration choice. The available options are:
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Print registers and reboot (
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT) — default option.This volition print register values at the bespeak of the exception, print the backtrace, and restart the chip.
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Print registers and halt (
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT)Similar to the higher up choice, but halt instead of rebooting. External reset is required to restart the program.
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Silent reboot (
CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT)Don't print registers or backtrace, restart the fleck immediately.
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Invoke GDB Stub (
CONFIG_ESP_SYSTEM_PANIC_GDBSTUB)Kickoff GDB server which tin communicate with GDB over console UART port. This pick will only provide read-only debugging or mail service-mortem debugging. See GDB Stub for more details.
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Invoke dynamic GDB Stub (
ESP_SYSTEM_GDBSTUB_RUNTIME)Offset GDB server which can communicate with GDB over console UART port. This option allows the user to debug a plan at run time and prepare break points, change the execution, etc. See GDB Stub for more than details.
The beliefs of the panic handler is afflicted past 2 other configuration options.
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If CONFIG_ESP_DEBUG_OCDAWARE is enabled (which is the default), the panic handler will detect whether a JTAG debugger is continued. If it is, execution will exist halted and control will be passed to the debugger. In this example, registers and backtrace are not dumped to the console, and GDBStub / Cadre Dump functions are not used.
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If the Core Dump feature is enabled, and then the system state (task stacks and registers) will be dumped to either Flash or UART, for afterwards analysis.
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If CONFIG_ESP_PANIC_HANDLER_IRAM is disabled (disabled by default), the panic handler code is placed in flash retentivity, not IRAM. This means that if ESP-IDF crashes while wink cache is disabled, the panic handler volition automatically re-enable flash cache before running GDB Stub or Cadre Dump. This adds some minor risk, if the flash cache status is also corrupted during the crash.
If this selection is enabled, the panic handler code (including required UART functions) is placed in IRAM, and hence will decrease the usable memory space in SRAM. Merely this may be necessary to debug some complex problems with crashes while wink enshroud is disabled (for example, when writing to SPI flash) or when flash cache is corrupted when an exception is triggered.
The following diagram illustrates the panic handler behavior:
Panic Handler Flowchart (click to enlarge)¶
Register Dump and Backtrace¶
Unless the CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT option is enabled, the panic handler prints some of the CPU registers, and the backtrace, to the panel
Core 0 register dump : PC : 0x400e14ed PS : 0x00060030 A0 : 0x800d0805 A1 : 0x3ffb5030 A2 : 0x00000000 A3 : 0x00000001 A4 : 0x00000001 A5 : 0x3ffb50dc A6 : 0x00000000 A7 : 0x00000001 A8 : 0x00000000 A9 : 0x3ffb5000 A10 : 0x00000000 A11 : 0x3ffb2bac A12 : 0x40082d1c A13 : 0x06ff1ff8 A14 : 0x3ffb7078 A15 : 0x00000000 SAR : 0x00000014 EXCCAUSE : 0x0000001d EXCVADDR : 0x00000000 LBEG : 0x4000c46c LEND : 0x4000c477 LCOUNT : 0xffffffff Backtrace : 0x400e14ed : 0x3ffb5030 0x400d0802 : 0x3ffb5050 The register values printed are the register values in the exception frame, i.e., values at the moment when the CPU exception or another fatal error has occurred.
A Annals dump is not printed if the panic handler has been executed as a issue of an abort() call.
In some cases, such as interrupt watchdog timeout, the panic handler may print boosted CPU registers (EPC1-EPC4) and the registers/backtrace of the code running on the other CPU.
The backtrace line contains PC:SP pairs, where PC is the Programme Counter and SP is Stack Pointer, for each stack frame of the current chore. If a fatal mistake happens inside an ISR, the backtrace may include PC:SP pairs both from the task which was interrupted, and from the ISR.
If IDF Monitor is used, Plan Counter values will be converted to code locations (function proper name, file proper name, and line number), and the output will be annotated with additional lines:
Core 0 register dump : PC : 0x400e14ed PS : 0x00060030 A0 : 0x800d0805 A1 : 0x3ffb5030 0x400e14ed : app_main at / Users / user / esp / case / main / main . cpp : 36 A2 : 0x00000000 A3 : 0x00000001 A4 : 0x00000001 A5 : 0x3ffb50dc A6 : 0x00000000 A7 : 0x00000001 A8 : 0x00000000 A9 : 0x3ffb5000 A10 : 0x00000000 A11 : 0x3ffb2bac A12 : 0x40082d1c A13 : 0x06ff1ff8 0x40082d1c : _calloc_r at / Users / user / esp / esp - idf / components / newlib / syscalls . c : 51 A14 : 0x3ffb7078 A15 : 0x00000000 SAR : 0x00000014 EXCCAUSE : 0x0000001d EXCVADDR : 0x00000000 LBEG : 0x4000c46c LEND : 0x4000c477 LCOUNT : 0xffffffff Backtrace : 0x400e14ed : 0x3ffb5030 0x400d0802 : 0x3ffb5050 0x400e14ed : app_main at / Users / user / esp / example / chief / chief . cpp : 36 0x400d0802 : main_task at / Users / user / esp / esp - idf / components / esp32 / cpu_start . c : 470 To find the location where a fatal error has happened, look at the lines which follow the "Backtrace" line. Fatal fault location is the top line, and subsequent lines show the call stack.
GDB Stub¶
If the CONFIG_ESP_SYSTEM_PANIC_GDBSTUB option is enabled, the panic handler will not reset the chip when a fatal fault happens. Instead, it will outset a GDB remote protocol server, usually referred to as GDB Stub. When this happens, a GDB instance running on the host estimator can be instructed to connect to the ESP32 UART port.
If IDF Monitor is used, GDB is started automatically when a GDB Stub prompt is detected on the UART. The output looks like this:
Entering gdb stub now. $T0b#e6GNU gdb (crosstool-NG crosstool-ng-one.22.0-eighty-gff1f415) 7.10 Copyright (C) 2015 Costless Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is gratuitous software: you are free to alter and redistribute information technology. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=x86_64-build_apple-darwin16.3.0 --target=xtensa-esp32-elf". Type "show configuration" for configuration details. For bug reporting instructions, delight encounter: <http://www.gnu.org/software/gdb/bugs/>. Notice the GDB manual and other documentation resource online at: <http://www.gnu.org/software/gdb/documentation/>. For assistance, blazon "aid". Type "concerning word" to search for commands related to "give-and-take"... Reading symbols from /Users/user/esp/instance/build/example.elf...done. Remote debugging using /dev/cu.usbserial-31301 0x400e1b41 in app_main () at /Users/user/esp/example/master/main.cpp:36 36 *((int*) 0) = 0; (gdb) The GDB prompt can be used to inspect CPU registers, local and static variables, and arbitrary locations in memory. Information technology is not possible to set breakpoints, alter the PC, or continue execution. To reset the plan, leave GDB and perform an external reset: Ctrl-T Ctrl-R in IDF Monitor, or using the external reset push button on the development board.
Guru Meditation Errors¶
This section explains the pregnant of different error causes, printed in parens after the Guru Meditation Error: Core panic'ed message.
IllegalInstruction¶
This CPU exception indicates that the instruction which was executed was non a valid instruction. Most common reasons for this error include:
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FreeRTOS chore role has returned. In FreeRTOS, if a task role needs to cease, it should phone call
vTaskDelete()and delete itself, instead of returning. -
Failure to read next education from SPI wink. This usually happens if:
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Application has reconfigured the SPI wink pins as another function (GPIO, UART, etc.). Consult the Hardware Pattern Guidelines and the datasheet for the scrap or module for details about the SPI flash pins.
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Some external device has accidentally been connected to the SPI flash pins, and has interfered with communication between ESP32 and SPI flash.
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In C++ code, exiting from a non-void function without returning a value is considered to be an undefined behavior. When optimizations are enabled, the compiler volition oftentimes omit the epilogue in such functions. This virtually often results in an IllegalInstruction exception. Past default, ESP-IDF build system enables
-Werror=return-typewhich means that missing render statements are treated as compile fourth dimension errors. Even so if the application project disables compiler warnings, this issue might go undetected and the IllegalInstruction exception will occur at run fourth dimension.
InstrFetchProhibited¶
This CPU exception indicates that the CPU could non read an instruction considering the accost of the didactics does non belong to a valid region in didactics RAM or ROM.
Usually, this means an attempt to phone call a function pointer, which does not point to valid code. PC (Plan Counter) register can exist used as an indicator: it volition be nothing or will comprise a garbage value (not 0x4xxxxxxx ).
LoadProhibited, StoreProhibited¶
These CPU exceptions happen when an application attempts to read from or write to an invalid retention location. The address which has been written/read is plant in the EXCVADDR register in the register dump. If this address is goose egg, it usually ways that the application has attempted to dereference a NULL pointer. If this accost is close to zero, it usually means that the application has attempted to admission a fellow member of a structure, but the arrow to the construction is NULL. If this address is something else (garbage value, not in 0x3fxxxxxx - 0x6xxxxxxx range), information technology probable means that the pointer used to admission the data is either not initialized or has been corrupted.
IntegerDivideByZero¶
Awarding has attempted to do an integer division by zilch.
LoadStoreAlignment¶
Application has attempted to read or write a memory location, and the address alignment does not match the load/store size. For example, a 32-bit read can only be done from a 4-byte aligned accost, and a 16-scrap write tin just exist done to a 2-byte aligned accost.
LoadStoreError¶
This exception may happen in the following cases:
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If the application has attempted to practice an 8- or sixteen- chip read to, or write from, a retentivity region which only supports 32-bit reads/writes. For example, dereferencing a
char*pointer to pedagogy memory (IRAM, IROM) will result in such an error. -
If the application has attempted to write to a read-only memory region, such as IROM or DROM.
Unhandled debug exception¶
This will usually be followed by a bulletin similar:
Debug exception reason : Stack canary watchpoint triggered ( task_name ) This error indicates that the application has written past the end of the stack of the task with name task_name . Note that not every stack overflow is guaranteed to trigger this error. Information technology is possible that the task writes to retention beyond the stack canary location, in which example the watchpoint will not exist triggered.
Interrupt wdt timeout on CPU0 / CPU1¶
Indicates that an interrupt watchdog timeout has occurred. See Watchdogs for more information.
Cache disabled but buried memory region accessed¶
In some situations, ESP-IDF will temporarily disable access to external SPI Flash and SPI RAM via caches. For example, this happens when spi_flash APIs are used to read/write/erase/mmap regions of SPI Flash. In these situations, tasks are suspended, and interrupt handlers not registered with ESP_INTR_FLAG_IRAM are disabled. Make sure that any interrupt handlers registered with this flag take all the code and data in IRAM/DRAM. Refer to the SPI flash API documentation for more than details.
Other Fatal Errors¶
Brownout¶
ESP32 has a built-in brownout detector, which is enabled by default. The brownout detector can trigger a system reset if the supply voltage goes below a safe level. The brownout detector tin can be configured using CONFIG_ESP_BROWNOUT_DET and CONFIG_ESP_BROWNOUT_DET_LVL_SEL options.
When the brownout detector triggers, the following message is printed:
Brownout detector was triggered The scrap is reset after the message is printed.
Note that if the supply voltage is dropping at a fast rate, just part of the message may exist seen on the console.
Decadent Heap¶
ESP-IDF'due south heap implementation contains a number of run-fourth dimension checks of the heap construction. Additional checks ("Heap Poisoning") can be enabled in menuconfig. If one of the checks fails, a message like to the following will be printed:
CORRUPT HEAP : Bad tail at 0x3ffe270a . Expected 0xbaad5678 got 0xbaac5678 assertion "caput != Goose egg" failed : file "/Users/user/esp/esp-idf/components/heap/multi_heap_poisoning.c" , line 201 , function : multi_heap_free abort () was called at PC 0x400dca43 on core 0 Consult Heap Retentivity Debugging documentation for further information.
Stack Bully¶
Stack keen protection (based on GCC -fstack-protector* flags) can be enabled in ESP-IDF using CONFIG_COMPILER_STACK_CHECK_MODE option. If stack corking is detected, bulletin like to the following volition be printed:
Stack smashing protect failure! arrest() was chosen at PC 0x400d2138 on core 0 Backtrace: 0x4008e6c0:0x3ffc1780 0x4008e8b7:0x3ffc17a0 0x400d2138:0x3ffc17c0 0x400e79d5:0x3ffc17e0 0x400e79a7:0x3ffc1840 0x400e79df:0x3ffc18a0 0x400e2235:0x3ffc18c0 0x400e1916:0x3ffc18f0 0x400e19cd:0x3ffc1910 0x400e1a11:0x3ffc1930 0x400e1bb2:0x3ffc1950 0x400d2c44:0x3ffc1a80 0 The backtrace should point to the part where stack groovy has occurred. Check the office code for unbounded access to local arrays.
Undefined beliefs sanitizer (UBSAN) checks¶
Undefined behavior sanitizer (UBSAN) is a compiler feature which adds run-time checks for potentially wrong operations, such equally:
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overflows (multiplication overflow, signed integer overflow)
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shift base or exponent errors (e.g. shift by more than 32 bits)
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integer conversion errors
See GCC documentation of -fsanitize=undefined option for the consummate list of supported checks.
Enabling UBSAN¶
UBSAN is disabled by default. Information technology tin exist enabled at file, component, or project level by adding the -fsanitize=undefined compiler option in the build system.
When enabling UBSAN for lawmaking which uses the SOC hardware register header files ( soc/xxx_reg.h ), it is recommended to disable shift-base sanitizer using -fno-sanitize=shift-base option. This is due to the fact that ESP-IDF register header files currently contain patterns which cause false positives for this specific sanitizer option.
To enable UBSAN at projection level, add the following code at the end of the projection's CMakeLists.txt file:
idf_build_set_property ( COMPILE_OPTIONS "-fsanitize=undefined" "-fno-sanitize=shift-base" Append ) Alternatively, pass these options through the EXTRA_CFLAGS and EXTRA_CXXFLAGS environment variables.
Enabling UBSAN results in significant increase of code and data size. Most applications, except for the trivial ones, will not fit into the bachelor RAM of the microcontroller when UBSAN is enabled for the whole application. Therefore it is recommended that UBSAN is instead enabled for specific components under test.
To enable UBSAN for a specific component ( component_name ) from the project'due south CMakeLists.txt file, add the post-obit lawmaking at the end of the file:
idf_component_get_property(lib component_name COMPONENT_LIB) target_compile_options(${lib} Private "-fsanitize=undefined" "-fno-sanitize=shift-base") To enable UBSAN for a specific component ( component_name ) from CMakeLists.txt of the same component, add the following at the end of the file:
target_compile_options(${COMPONENT_LIB} Individual "-fsanitize=undefined" "-fno-sanitize=shift-base") UBSAN output¶
When UBSAN detects an error, a message and the backtrace are printed, for example:
Undefined behavior of type out_of_bounds Backtrace : 0x4008b383 : 0x3ffcd8b0 0x4008c791 : 0x3ffcd8d0 0x4008c587 : 0x3ffcd8f0 0x4008c6be : 0x3ffcd950 0x400db74f : 0x3ffcd970 0x400db99c : 0x3ffcd9a0 When using IDF Monitor, the backtrace will exist decoded to part names and source lawmaking locations, pointing to the location where the issue has happened (hither it is master.c:128 ):
0x4008b383 : panic_abort at / path / to / esp - idf / components / esp_system / panic . c : 367 0x4008c791 : esp_system_abort at / path / to / esp - idf / components / esp_system / system_api . c : 106 0x4008c587 : __ubsan_default_handler at / path / to / esp - idf / components / esp_system / ubsan . c : 152 0x4008c6be : __ubsan_handle_out_of_bounds at / path / to / esp - idf / components / esp_system / ubsan . c : 223 0x400db74f : test_ub at main . c : 128 0x400db99c : app_main at main . c : 56 ( discriminator 1 ) The types of errors reported past UBSAN tin be every bit follows:
| Name | Meaning |
|---|---|
| | Incorrect pointer value: nix, unaligned, not compatible with the given type. |
| | Integer overflow during addition, subtraction, multiplication, negation. |
| | Integer sectionalisation by 0 or |
| | Overflow in left or right shift operators. |
| | Access outside of bounds of an array. |
| | Unreachable code executed. |
| | Non-void office has reached its end without returning a value (C++ only). |
| | Size of variable length array is not positive. |
| | Value of |
| | Goose egg statement passed to a function which is alleged with a |
| | Nix value returned from a office which is declared with |
| | |
| | Overflow in arrow arithmetics. |
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Source: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/fatal-errors.html
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